Modern data processing apparatus are becoming ever more complex and more and more complex systems are now commonly being provided as Systems On Chip (SoCs). As such, the tracing and debugging of such circuits is becoming more problematic and typically apparatus needs to be debugged without halting the operation of the apparatus. In order to achieve such debugging with the apparatus running, debug circuitry is provided to monitor the functioning of the processing apparatus. This monitoring typically generates so-called trace data which is passed from the debug circuitry and out of the processing apparatus. The trace data can then be analysed to debug the functionality of the processing apparatus.
Handling the volume of such trace data can in itself be difficult when it is considered that circuits often operate at a clock frequency of Gigahertz. Such frequencies mean that significant amounts of trace data are generated and typically this would be of the order of a Gbit/s from a single core. This problem is compounded when it is considered that a modern SoC, etc. will often contain a plurality of such cores. As such, it can be difficult to move this amount of information from the processing apparatus.
One solution to this has been proposed by the MIPI™ alliance (www.mipi.org) which uses the processing circuitry of the processing apparatus being debugged to control communication over a USB (ie Universal Serial Bus) communication bus. Such a solution allows the USB communication bus to be used to output a stream of trace elements without significantly increasing the amount of circuitry required on the SoC.
It does however alter the operation of the processing circuitry of the processing apparatus.